1. Field of the Invention
The present invention relates to a MOS type semiconductor device using high melting point metal as a gate electrode and a method for manufacturing the same.
2. Description of the Related Art
A MOS gate electrode is generally composed of a metal so as to reduce its own resistance. In a MOS FET, in particular, which has its source and drain regions formed in a self-aligned way relative to a gate electrode, a gate electrode is formed using a high melting point metal so as to prevent the gate electrode from being melted at a high temperature step for forming source and drain regions. However, the gate electrode formed of a high melting point metal is liable to be separated from a gate insulating film when it is heated at a temperature of over 1000.degree. C.
A MOS FET device having a cross-sectional structure as shown, for example, in FIG. 1 is used so as to prevent the separation of the gate electrode as set out above, the oxidation of the gate electrode per se and so on.
In FIG. 1, reference numeral 31 shows a p type silicon semiconductor substrate. A gate oxide film 32 is formed on the semiconductor substrate 31. A gate electrode 36 is formed over the substrate 31 and composed of a three-layered structure of a first high melting point metal silicide 33, a high melting point metal layer 34 and a second high melting point metal silicide layer 35. N+ type diffusion layers 37 and 38 are formed as source and drain regions in the surface portion of the substrate 31.
Here, the widths of the layers of the gate electrode 36 of a three-layered structure, that is a length (hereinafter referred to as a width) defined in a direction parallel to that in which the channel of a MOS FET extends, are exactly equal to each other or are somewhat decreased toward a top layer as shown in FIG. 1 which is caused by a side etching at an etching step.
In the MOS FET having a cross-sectional structure as set out above, a gate area is determined by the high melting point metal silicide layer 33 of a largest width. Stated in another way, a value of a gate capacitance in the MOS FET was determined by the width of the first high melting point metal silicide layer 33 situated near the substrate 31, so that a greater gate capacitance was involved in the conventional structure. Further, the resistive value of the gate electrode is determined by that of the high melting point metal layer 34 of a lowest resistivity. Since the width of the layer 34 is made smaller than that of the first high melting point silicide layer 33 by an effect of the side etching, etc., a gate's resistive valve is increased by that extent. As a result, an improved high frequency characteristic cannot be expected from the conventional MOS FET.